用于X射线探测的多通道电荷读出芯片

doi:10.19665/j.issn1001-2400.2021.04.013

摘要/Abstract

摘要：

针对传统用于X射线探测的多通道电荷读出电路面积大、功耗高的问题,提出一种新型的多通道电荷读出电路结构。该电路集成32个电荷读取通道,主要包括电容积分器、差分输出缓冲电路和数字控制逻辑电路等功能模块。通过将采样保持电路和相关双采样集成到输出缓冲器,大大地降低了整体芯片的功耗和面积。为减小失调和低频噪声,电路采用相关双采样技术;同时采用奇偶通道交叠输出方式,实现多通道信号连续输出。芯片采用CMOS 0.25 μm工艺制造,面积为2.87 mm×2.68 mm。测试结果显示,在5.0 V供电和2.5 V参考电压下,每通道的功耗为1.5 mW;当积分电容为7.8 pF时,积分非线性小于0.1%,动态范围达到13 100。

关键词: X射线, 多通道, 电荷读出电路, 低噪声, 动态范围

Abstract:

To solve the problem of large area and high power consumption of the traditional multi-channel charge readout circuit for X-ray detection,a new multi-channel charge readout circuit structure is presented.The circuit integrates 32 charge acquisition channels,including an integrator,a differential output buffer,a digital control logic circuit and other functional modules.The proposed structure reduces the power consumption and area by integrating the sample and hold circuit and the correlated double sampling circuit into the output buffer.In order to reduce the offset and low-frequency noise,the correlated double sampling technology has been adopted.In addition,the way of overlapping the outputs between the even and odd channels is adopted to realize continuous transmission of the multi-channel signals.The chip has been fabricated using the CMOS 0.25 μm process with the chip size of 2.87 mm×2.68 mm.Measurement results show that the power consumption of each channel is 1.5 mW under the 5.0 V voltage supply and 2.5 V reference voltage.When the integrated capacitor is 7.8 pF,the integration non-linearity is less than 0.1% and the dynamic range reaches 13 100.

Key words: X-ray, multi-channel, charge readout circuit, low noise, dynamic range

中图分类号:

TN492

刘宏,徐乐,田彤. 用于X射线探测的多通道电荷读出芯片[J]. 西安电子科技大学学报, 2021, 48(4): 97-102.

LIU Hong,XU Le,TIAN Tong. Multi-channel charge readout ASIC for X-ray detection[J]. Journal of Xidian University, 2021, 48(4): 97-102.

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参考文献 15

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性能	文献[13]	文献[14]	文献[15]	文中方法
工艺	CMOS 0.35 μm	CMOS 0.18 μm	CMOS 0.18 μm	CMOS 0.25 μm
通道数	32	32	1	32
电源电压/V	5.0	1.8	1.8	5.0
转换速率/MHz	1	40	1	1(2 @max)
积分线性度		<0.27%	0.1%(仿真值)	0.1%@7.8 pF
动态范围	8000@C_f=2.4 pF	10 bit		6 000@C_f=2.6 pF,
				13 100@C_f=7.8 pF
芯片面积/mm²	4.9×1.8	2.082×2.63	0.85×0.35	2.87×2.68
		(front-end) &
		2.169×2.937
		(@SCA)*
功耗/(mW·CH^-1)	6.25	2.00	4.00	1.50