Journal of Xidian University ›› 2019, Vol. 46 ›› Issue (3): 160-166.doi: 10.19665/j.issn1001-2400.2019.03.024

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Design of a 52 GHz balanced frequency doubler

YU Wenmin1,2,3,LU Yumin1,2,3   

  1. 1. Shanghai Institute of Microsystem and Information Technology of the Chinese Academy of Science, Shanghai 200050
    2. Center of Materials Science and Optoelectronics Engineering, University of the Chinese Academy of Sciences, Beijing 100049
    3. University of Chinese Academy of Science, Beijing 100049
  • Received:2018-12-11 Online:2019-06-20 Published:2019-06-19

Abstract:

In order to generate a high frequency signal source, a 52 GHz balanced frequency doubler with high efficiency and good fundamental rejection is designed. The doubler is fabricated in a 0.13 μm SiGe Bipolar junction transistor by the Complementary Metal Oxide Semiconductor (BiCMOS) technology. A balun is used to split the single-ended signal into differential signals. A second harmonic reflector reduces the effect of the feedback signal of the second harmonic on the output signal and improves the output power. The measurement results based on the probe station demonstrate that the insertion loss of the balun is about 1 dB from 20 GHz to 26.5 GHz. With an input power of 0.5 dBm, the doubler delivers an output second harmonic power of 2.3 dBm with 34 dBc of fundamental rejection. The doubler consumes a dc power of about 21.8 mW with the corresponding power-added efficiency (PAE) of 2.5%.

Key words: frequency doubler, SiGe, heterojunction bipolar transistor, second harmonic reflector

CLC Number: 

  • TN771

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