一种宽范围、高精度的带宽自适应式四相DLL

doi:10.19665/j.issn1001-2400.2022.01.020

Abstract

Abstract:

This paper presents a four-phase output delay locked loop (DLL) with one adaptive bandwidth delay chain structure,which is suitable for the clock generation of the NAND Flash high-speed interface circuit meeting the ONFI 4.2 international protocol standard.In order to solve the problem of the limited delay time of the traditional delay chain in a wide frequency range,a configurable delay chain circuit structure is proposed,which can select the appropriated delay units in different frequency bands so that the operating frequency range of DLL is extended and the lock accuracy is maintained.In addition,an adaptive control circuit based on the frequency detector is proposed,which can track the input clock frequency,automatically configure the delay chain,and realize the adaptive bandwidth of the DLL.In the SMIC 28nm CMOS process,the DLL circuit is designed.Simulation results show that the locking range of the DLL is [22 MHz,1.6 GHz] with the maximum locking accuracy being 17 ps at the 25℃/0.9 V power supply and typical process corner.

Key words: delay locked loop, NAND Flash high-speed interface, wide-range, high accuracy

CLC Number:

TN911.8

YANG Xue,LIU Fei,HUO Zongliang. Wide-range and high-accuracy four-phase DLL with the adaptive-bandwidth scheme[J].Journal of Xidian University, 2022, 49(1): 194-201.

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References 12

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参数	文献[7]	文献[10]	文中
工艺	130 nm	90 nm	28 nm
锁频范围/MHz	80~450	100~2 700	22~1 600@typical corner
锁定精度/ps	60		17
电源电压/V	1.5	1.0	0.9
功耗/mW	26@180 MHz	49.4@2700 MHz	1.7@1.6 GHz 1.1@800 MHz

Wide-range and high-accuracy four-phase DLL with the adaptive-bandwidth scheme

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