J4 ›› 2012, Vol. 39 ›› Issue (6): 136-141.doi: 10.3969/j.issn.1001-2400.2012.06.022

• Original Articles • Previous Articles     Next Articles

Jitter and ringing cancellation techniques for signal integrity design

TONG Xingyuan1;ZHU Zhangming2;YAN Yintang2;KONG Liang2   

  1. (1. Communication ASIC Design Eng. Center, Xi'an Univ. of Posts & Telecommunications, Xi'an  710121, China;
    2. School of Microelectronic, Xidian Univ., Xi'an  710071, China)
  • Received:2011-07-28 Online:2012-12-20 Published:2013-01-17
  • Contact: TONG Xingyuan E-mail:mayxt@126.com

Abstract:

This paper focus mainly on the research on jitter and ringing for signal integrity design. To optimize the jitter caused by ISI (ISI: Inter-Symbol Interference) during high speed signal transmission, a novel current-mode pre-emphasis circuit is presented. Compared with the traditional structure, this novel circuit not only improves the operation speed by pre-emphasizing in both the posedge and negedge of the signal, but also reduces the circuit complexity. Furthermore, with the consideration of the bonding wire model and the chip load, a technique based on impedance matching is proposed to reduce the ringing in LVDS(Low-Voltage Differential Signaling). Simulation and measurement results of the eye-diagram are analyzed, proving the applicability of the proposed circuit and technique.

Key words: signal integrity, jitter, pre-emphasis circuit, ringing, impedance matching

CLC Number: 

  • TN431.2

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