0.35μm CMOS工艺的品质因数时域测量电路

doi:10.3969/j.issn.1001-2400.2017.02.014

Abstract

Abstract:

Based on the time-domain quality factor (Q-factor) measurement principle, an architecture which not only achieves an accurate Q-factor at the specific frequency but also covers a range of frequencies without any loss in Q-factor measurement accuracy is proposed. Based on a reconfigurable structure, an improved peak detector compensation method is presented. To guide the design of such an architecture, a theoretical analysis for reaching the required accuracy and expanding the input frequency range has been first developed in this paper. Besides, the system power dissipation can be reduced by 7.5％ thanks to the improved digital control logic. In this paper, circuit is realized in a 0.35μm CMOS process for the first time. With the 5V supply voltage and 1MHz input frequency, the post-layout simulation result have demonstrated that an accuracy of the Q-factor measurement is within 0.2％. Furthermore, the input frequency range that can be measured by this circuit is extended from 100kHz to 1.5MHz with the same accuracy.

Key words: quality factor (Q-factor), time domain measurement, on-chip

REN Xiaojiao;ZHANG Ming;LLASER Nicolas;YUE Baihe;ZHUANG Yiqi. Circuit of time-domain quality factor measurement in 0.35μm CMOS process[J].Journal of Xidian University, 2017, 44(2): 75-80.

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Circuit of time-domain quality factor measurement in 0.35μm CMOS process

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