逐次逼近ADC无源器件的匹配性与高层次模型

doi:10.3969/j.issn.1001-2400.2011.06.020

Abstract

Abstract:

The paper focuses on the research on the mismatch of the passive components in the SAR (Successive Approximation Register) ADC (Analog-to-Digital Converter). Based on the charge redistribution, voltage division and hybrid SAR ADC architectures, the matching requirements of their internal passive component networks are explored with theoretical derivation and verified by high-level modeling using Matlab. Furthermore, without adding any matching requirement of the internal passive components, a novel charge redistribution approach based on the unit scalable capacitor is proposed. With the unit capacitor replacing the non-integral scalable capacitor and by adding several additional logic control signals, this new approach is easier to realize in process than the traditional approach and is very suitable for embedded SoC applications.

Key words: analog-to-digital converter, successive approximation register, passive components, mismatch, high-level model

TONG Xingyuan;YANG Yintang;ZHU Zhangming;LIU Lianxi. Mismatch analysis and high-level modeling of passive components in successive approximation A/D converters[J].J4, 2011, 38(6): 123-129.

References

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Mismatch analysis and high-level modeling of passive components in successive approximation A/D converters

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