Based on the twisting-ring counter (TRC) and linear feedback shift register (LFSR), a kind of test pattern generator, which can realizes two-dimensional test pattern compression is presented. The proposed approach utilizes the test set embedding technique based on TRC and LFSR reseeding schemes to achieve the vertical and horizontal compressions of the test set, which significantly reduces the width and length of the deterministic test set. Theoretical analysis shows that the length of LFSR of the design is reduced up to smax+2 from smax+20, which increases the encoding efficiency. In order to target the minimization of the number of the LFSR seeds, an efficient LFSR seed selection algorithm is then proposed. Here, each LFSR seed is decoded as a TRC seed, and then, the TRC seed generates 2n2+n test patterns. Experimental results for the ISCAS89 benchmark circuits show that the proposed scheme requires 69％ less test data storage compared with previous schemes, and that the test control logic is simple for all CUTs, and can be shared among multiple CUTs.
